instruction decoding

instruction decoding
= ID
декодирование (дешифрация) команды
этап работы ЦП после выборки новой команды из памяти в регистр команд процессора, на котором определяется тип исполняемой команды

Англо-русский толковый словарь терминов и сокращений по ВТ, Интернету и программированию. . 1998-2007.

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Смотреть что такое "instruction decoding" в других словарях:

  • Instruction register — In computing, an instruction register is the part of a CPU s control unit that stores the instruction currently being executed. In simple processors each instruction to be executed is loaded into the instruction register which holds it while it… …   Wikipedia

  • Instruction set — An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception… …   Wikipedia

  • Instruction pipeline — Pipelining redirects here. For HTTP pipelining, see HTTP pipelining. Basic five stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back). In the fourth clock… …   Wikipedia

  • Reduced instruction set computer — The acronym RISC (pronounced risk ), for reduced instruction set computing, represents a CPU design strategy emphasizing the insight that simplified instructions which do less may still provide for higher performance if this simplicity can be… …   Wikipedia

  • Complex instruction set computing — A complex instruction set computer (CISC) (  /ˈsɪs …   Wikipedia

  • Complex instruction set computer — A complex instruction set computer (CISC, pronounced like sisk ) is a microprocessor instruction set architecture (ISA) in which each instruction can execute several low level operations, such as a load from memory, an arithmetic operation, and a …   Wikipedia

  • Central processing unit — CPU redirects here. For other uses, see CPU (disambiguation). An Intel 80486DX2 CPU from above An Intel 80486DX2 from below …   Wikipedia

  • Microcode — is a layer of hardware level instructions and/or data structures involved in the implementation of higher level machine code instructions in many computers and other processors; it resides in special high speed memory and translates machine… …   Wikipedia

  • MOS Technology 6502 — The MOS Technology 6502 is an 8 bit microprocessor that was designed by Chuck Peddle for MOS Technology in 1975. When it was introduced, it was the least expensive full featured CPU on the market by a considerable margin, costing less than one… …   Wikipedia

  • Berkeley RISC — was one of two seminal research projects into RISC based microprocessor design taking place under ARPA s VLSI project. RISC was led by David Patterson at the University of California, Berkeley between 1980 and 1984, while the other was taking… …   Wikipedia

  • Intel iAPX 432 — Infobox Computer Hardware Cpu name = Intel iAPX 432 caption = produced start = 1981 produced end = slowest = 5 |slow unit = MHz fastest = 8 |fast unit = MHz fsb slowest = | fsb slow unit = fsb fastest = | fsb fast unit = manuf1 = Intel arch =… …   Wikipedia


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